USTC/Demonstration

From 2007.igem.org

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[[Image:DemonstrationSystem.png|thumb]]
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A actual demonstration shown in Figure 1 is decided to be built up to show the ability
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[[Image:DemonstrationLogic.png|thumb]]
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of our method. This demo system is designed as simple as possible, without no "cool" logic
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[[Image:DemonstrationTruthTable.png|thumb]]
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function. But all the three logic gates are included, form into a three-level logic circuit. Meanwhile wires can cross and branch off. Figure 2 shows the signal pathway, and all the components
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are loaded on plasmid [http://partsregistry.org/Part:BBa_I732998 pSB1A3-I732998] and [http://partsregistry.org/Part:BBa_I732999 pSB1A3-I732999].
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This demo system accepts aTc and AHL signal, and is expected to output the results as the truth table shown in Figure 3.
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[[Image:DemonstrationLogic.png|thumb|512px|left|'''Figure 1''']]
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[[Image:DemonstrationSystem.png|thumb|512px|'''Figure 2''']]
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[[Image:DemonstrationTruthTable.png|thumb|'''Figure 3''']]

Revision as of 15:56, 16 October 2007

A actual demonstration shown in Figure 1 is decided to be built up to show the ability of our method. This demo system is designed as simple as possible, without no "cool" logic function. But all the three logic gates are included, form into a three-level logic circuit. Meanwhile wires can cross and branch off. Figure 2 shows the signal pathway, and all the components are loaded on plasmid pSB1A3-I732998 and pSB1A3-I732999.

This demo system accepts aTc and AHL signal, and is expected to output the results as the truth table shown in Figure 3.

Figure 1
Figure 2
Figure 3