USTC/Demonstration

From 2007.igem.org

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A actual demonstration is decided to be built up to show the ability of our method. This demo system is designed as simple as possible, without no "cool" logic function. But all the three logic gates are included, form into a three-level logic circuit. Meanwhile wires can cross and branch off. In practice, all the components are loaded on two plasmids, [http://partsregistry.org/Part:BBa_I732998 pSB1A3-I732998] and [http://partsregistry.org/Part:BBa_I732999 pSB1A3-I732999]. This demo system accepts aTc and AHL signal, and is expected to output the results as the truth table shown in Figure 3.
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[[Image:DemonstrationLogic.png|thumb|512px|left|'''Figure 1''' The logic diagram of the demo system.]]
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[[Image:DemonstrationLogic.png|512px|right|'''Figure 1''']]
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A actual demonstration shown in Figure 1 is decided to be built up to show the ability
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<br style="clear:both;">
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of our method. This demo system is designed as simple as possible, without no "cool" logic
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function. But all the three logic gates are included, form into a three-level logic circuit. Meanwhile wires can cross and branch off.
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= B =
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[[Image:DemonstrationSystem.png|512px|left|'''Figure 2'''  The signal pathway of the demo system.]]
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Figure 2 shows the signal pathway. In practice, all the components
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<br style="clear:both;">
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are loaded on two plasmids, [http://partsregistry.org/Part:BBa_I732998 pSB1A3-I732998] and [http://partsregistry.org/Part:BBa_I732999 pSB1A3-I732999].
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[[Image:DemonstrationSystem.png|512px|right|'''Figure 2''']]
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[[Image:DemonstrationTruthTable.png|thumb|right|'''Figure 3''' The truth table of the demo system]]
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= C =
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This demo system accepts aTc and AHL signal, and is expected to output the results as the truth table shown in Figure 3.
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[[Image:DemonstrationTruthTable.png|thumb|'''Figure 3''']]
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Revision as of 16:22, 16 October 2007

A actual demonstration is decided to be built up to show the ability of our method. This demo system is designed as simple as possible, without no "cool" logic function. But all the three logic gates are included, form into a three-level logic circuit. Meanwhile wires can cross and branch off. In practice, all the components are loaded on two plasmids, pSB1A3-I732998 and pSB1A3-I732999. This demo system accepts aTc and AHL signal, and is expected to output the results as the truth table shown in Figure 3.

Figure 1 The logic diagram of the demo system.


Figure 2  The signal pathway of the demo system.


Figure 3 The truth table of the demo system