USTC/Demonstration

From 2007.igem.org

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* includes all the three logic gates, which form into a three-level logic circuit;
* includes all the three logic gates, which form into a three-level logic circuit;
* shows that wires can cross and branch off (without interference);
* shows that wires can cross and branch off (without interference);
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* is loaded on two plasmids, [http://partsregistry.org/Part:BBa_I732998 pSB1A3-I732998] and [http://partsregistry.org/Part:BBa_I732999 pSB1A3-I732999] , and transformed into Top10 strain in practice;
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* is loaded on two plasmids, [http://partsregistry.org/Part:BBa_I732998 pSB1A3-I732998] and [http://partsregistry.org/Part:BBa_I732999 pSB1A3-I732999] ,
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and transformed into Top10 strain in practice;
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* accepts aTc and AHL signals as inputs;
* accepts aTc and AHL signals as inputs;
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* produce RFP and GFP signals as outputs;
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* produces RFP and GFP signals as outputs;
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* can be "resetted" by IPTG signal (i.e. all outputs lighten when IPTG added in);
* is expected to output the results as the truth table shown in Figure 2.
* is expected to output the results as the truth table shown in Figure 2.

Revision as of 18:52, 21 October 2007

An actual demonstration is decided to show the extensible ability of our method.

This demo system

  • is designed as simple as possible, without no "cool" logic function;
  • includes all the three logic gates, which form into a three-level logic circuit;
  • shows that wires can cross and branch off (without interference);
  • is loaded on two plasmids, pSB1A3-I732998 and pSB1A3-I732999 ,

and transformed into Top10 strain in practice;

  • accepts aTc and AHL signals as inputs;
  • produces RFP and GFP signals as outputs;
  • can be "resetted" by IPTG signal (i.e. all outputs lighten when IPTG added in);
  • is expected to output the results as the truth table shown in Figure 2.
Figure 1 The logic diagram of the demo system.


Figure 2 The truth table of the demo system


Figure 3 The signal pathway of the demo system.