Tianjin/FLIP-FLOP
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==Modeling== | ==Modeling== | ||
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<font size="3" color="#0000CC">1.</font>[[Tianjin/FLIP-FLOP/model1|<font size="3" color="#0000CC">Construction of Mathematical Model</font>]] | <font size="3" color="#0000CC">1.</font>[[Tianjin/FLIP-FLOP/model1|<font size="3" color="#0000CC">Construction of Mathematical Model</font>]] | ||
+ | <font size="3" color="#0000CC">2.<font size="3" color="#0000CC">Model Result</font> | ||
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==Experiment== | ==Experiment== |
Revision as of 09:01, 25 October 2007
Design"Flip-flop" is the common name given to two-state devices which offer basic memory for sequential logic operations. Flip-flops are widely used for digital data storage and transfer as well as in banks called "registers" for the storage of binary numerical data. Based on the conception of "Flip-flop" and synthetic biology, we designed the Genetically RS FLIP-FLOP whose output signal is regulated by additional input signal. Besides this, we modulate the performance of Genetically RS FLIP-FLOP to optimize our original design. 1.Instruction of Logic Function
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Modeling1.Construction of Mathematical Model 2.Model Result |
==Experiment== |